# Design a two bit down counter circuit that count from 11 to 00 – IGNOU MCA Assignment 2015 – 16

By | August 20, 2015

Design a two bit down counter circuit that count from 11 to 00. The initial state of the counter may be assumed to be 11. The counter will be in following successive states: 11, 10, 01, 00, 11, 10, 01, 00, 11 … Use any flip flop to design the circuit. You must design them using state transition diagram and Karnaugh’s map.

Course Code : BCSL-022
Course Title : Assembly Language Programming Lab
Assignment Number : BCA(II)/L-022/Assignment/2015
Maximum Marks : 50
Weightage : 25%

Solution :

A sequential circuit is specified by a time sequence of external inputs, external outputs and internal flip-flop binary states. Thus firstly, a state table and state diagram is used to describe behaviour of the circuit.

 Present State Input Next State Flip-Flops Inputs A B X A B DA DB 0 0 0 0 0 1 1 0 0 1 0 1 1 0 0 1 0 0 1 1 0 0 1 1 1 0 0 1 1 0 0 1 0 0 1 1 0 1 1 1 0 0 1 1 0 1 1 0 0 1 1 1 0 0 1 1

There are 2 flip-flop inputs for counter i.e. A, B. The next state of flip-flop is given in the table. DA indicates the flip flop input corresponding to flip-flop-A. This counter requires 2-flip-flops.

From this the flip flop input equations are simplified using K-Maps as shown below.

K-Map for DA is:

K-Map for DB is:

Thus, the simplified input equations for BCD counter are:

DA = ABC + |A|B + |A|C

DB = |B|C + BC

The logic circuit can be made with 2 D flip flops, 2 OR gates & 4 AND gates.