List all the features of the RISC architecture. 6m Jun2007
List some important features of RISC architecture :
- One instruction per cycle: A machine cycle is the time taken to fetch two operands from registers, perform the ALU operation on them and store the result in a register. Thus, RISC instruction execution takes about the same time as the micro-instructions on CISC machines. With such simple instruction execution rather than micro-instructions, it can use fast logic circuits for control unit, thus increasing the execution efficiency further.
- Register-to-register operands: In RISC machines the operation that access memories are LOAD and STORE. All other operands are kept in registers. This design feature simplifies the instruction set and, therefore, simplifies the control unitAnother benefit is that RISC encourages the optimization of register use, so that frequently used operands remain in registers.
- Simple addressing modes: Another characteristic is the use of simple addressing modes. The RISC machines use simple register addressing having displacement and PC relative modes. More complex modes are synthesized in software from these simple ones. Again,
- Simple instruction formats: RISC uses simple instruction formats. Generally, only one or a few instruction formats are used. In such machines the instruction length is fixed and aligned on word boundaries. In addition, the field locations can also be fixed.
- Performance using optimizing compilers: As the instructions are simple the compilers can be developed for efficient code organization also maximizing register utilization etc. Sometimes even the part of the complex instruction can be executed during the compile time.
- High performance of Instruction execution: While mapping of HLL to machine instruction the compiler favours relatively simple instructions. In addition, the control unit design is simple and it uses little or no microinstructions, thus could execute simple instructions faster than a comparable CISC. Simple instructions support better possibilities of using instruction pipelining.
- VLSI Implementation of Control Unit: A major potential benefit of RISC is the VLSI implementation of microprocessor. The VLSI Technology has reduced the delays of transfer of information among CPU components that resulted in a microprocessor. The delays across chips are higher than delay within a chip; thus, it may be a good idea to have the rare functions built on a separate chip. RISC chips are designed with this consideration. A VLSI processor is difficult to develop, as the designer must perform circuit design, layout, and modeling at the device level. With reduced instruction set architecture, this processor is far easier to build.
Write an assembly language program for 8086 microprocessor to sort a given list of 5 numbers in ascending order and explain its logic. 10m Jun2007
Solved program can be found on this link http://cssimplified.com/computer-organisation-and-assembly-language-programming/an-assembly-program-to-sort-a-given-set-of-8-bit-unsigned-intergers-into-ascending-order