Tag Archives: following


Explain the meaning and usage of each of the following function prototypes. jun2009

Explain the meaning and usage of each of the following function prototypes: 5×2=10m (i) getch ( )       (ii) strcmp ( )         (iii) getchar ( )       (iv) gets ( )        (v) puts ( ) (i) getch ( ) getch ( ) gets a character from console but… Read More »

Answer the following queries in SQL – IGNOU MCA Assignment 2015 – 16

MASTER OF COMPUTER APPLICATIONS Course Code : MCS-023 Course Title : Introduction to Database Management Systems Assignment Number : MCA(II)/023/Assignment/15-16 Maximum Marks : 100 Weightage : 25%   Consider the following EMP table: ENAME DEPT-NAME DESIGNATION SALARY DATE-OF-JOIN KARAN ACCOUNTING DIRECTOR 50000 Nov 17, 2012 FARAH RESEARCH ANALYST 30000 Dec 03, 1991 SCINDIA RESEARCH ANALYST… Read More »

Write a program and flowchart to display the following pattern: 6m Jun2008

Write a program and flowchart to display the following pattern: 6m Jun2008 1 2 3 4 5 6 7 8 9 1 0 11 12 13 14 15 16 17 18 19 20 21   Code: #include<stdio.h> void main() { int I,J,C=1; clrscr(); printf(“Result :\n”); for(I=0;I<6;I++) { printf(“\n”); for(J=0;J<=I;J++) { printf(“%d “,C++); } printf(“\n”); }… Read More »

Give the Excitation tables and Block diagrams for the following: 10m Jun2007

Give the Excitation tables and Block diagrams for the following: 10m Jun2007 (i)                 D flip-flop (ii)               T flip-flop   D Flip-Flop: The D flip-flop shown in Figure is a modification of the clocked SR flip-flop. The D input goes directly into the S input and the complement of the D input goes to the R… Read More »

Write a program to evaluate the following expression using an accumulator machine: A = B + C * D * E + F 7m jun2006

Write a program to evaluate the following expression using an accumulator machine: A = B + C * D * E + F     7m jun2006   Accumulator Architecture: An accumulator is a specially designated register that supplies one instruction operand and receives the result. The instructions in such machines are normally one-address instructions. The popular… Read More »

Explain the following: Parity bit, Floating point notation, Refresh rates in video controllers and an l/O channel 8m Jun2006

Explain the following with the help of an example or a diagram, whichever is appropriate:    8m jun2006 (i)                 Parity bit (ii)               Floating point notation (iii)             Refresh rates in video controllers (iv)             An l/O channel     Parity bit An error bit changes from 0 to 1 or 1 to 0. One of the simplest… Read More »

Simplify the following Boolean function in POS form using K-maps, also draw a logic diagram using only NAND gates 5m Dec2005

 Simplify the following boolean function in POS form using K-maps : F (A, B, C, D) = Σ (0, 2, 4, 5, 6, 8, 10, 13, 15) Also draw a logic diagram using only NAND gates.         5m Dec2005    K-Map for F is: Thus, the simplified equations for F (A, B, C, D) =… Read More »

Represent the following numbers in IEEE-754 floating point single precision number format: 4m Dec2005

Represent the following numbers in IEEE-754 floating point single precision number format:           4m Dec2005 (i)                 1011.1001 (ii)                -0.0011001   Single Precision   S stands for Sign (white color) E stands for Exponent (yellow color) N stands for Number (also called Mantissa or Significand) (green color)   0this Sign bit (1 bit) 1st to 8this Exponent… Read More »

Find out the errors, if any, in the following 5m Dec2005

Find out the errors, if any, in the following, and               5m Dec2005 (i)                 CMP AX, BX No error since two register operand are allowed for comparison in the permutations shown below. (ii)               IDlV AX, CH IDIV works or allows one parameter only and it can either be register or memory only as shown below. corrected… Read More »

A two-way set-associative cache memory uses blocks of four words. The cache can accommodate a total of 2048 words from the main memory. The main memory size is 128K x 32. 5m Dec2005

What is cache memory?                                                                                5m Dec2005 A two-way set-associative cache memory uses blocks of four words. The cache can accommodate a total of 2048 words from the main memory. The main memory size is 128K x 32. What are the sizes of the following?      TAG      INDEX      Data    … Read More »