# Tag Archives: circuit

## Draw logic circuit for a converter that converts 4 bit binary input to its equivalent BCD number. 8m Jun2008

Draw logic circuit for a converter that converts 4 bit binary input to its equivalent BCD number. 8m Jun2008 A four bit number can be any number value between 0 to 15  i.e.  0 to F in Hexadecimal. BCD is a number which is represented in binary as a decimal number hence it can have… Read More »

## Design a two bit down counter circuit that count from 11 to 00 – IGNOU MCA Assignment 2015 – 16

Design a two bit down counter circuit that count from 11 to 00. The initial state of the counter may be assumed to be 11. The counter will be in following successive states: 11, 10, 01, 00, 11, 10, 01, 00, 11 … Use any flip flop to design the circuit. You must design them… Read More »

## Simplify the following Boolean function in SOP form using K-Map: F (A, B, C, D) = Σ ( 0,1, 2, 4, 6, 8, 9, 12, 14, 15 ). Draw logic circuit diagram. 8m Jun2008

Simplify the following Boolean function in SOP form using K-Map: F (A, B, C, D) = Σ ( 0,1, 2, 4, 6, 8, 9, 12, 14, 15 ). Also, draw the simplified logic circuit diagram. 8m Jun2008  K-Map for F is: Thus, the simplified equations for F (A, B, C, D) = Σ (0,1, 2, 4, 6,… Read More »

## Design an Draw a circuit to interface four RAMs of 128 x 8 size and a ROM of 512 x 8 size. 8m Jun2007

Design a circuit to interface four RAMs of 128 x 8 size and a ROM of 512 x 8 size. Draw the memory map for the same. 8m Jun2007 Address lines:- 128 = 128 = 27 512 = 29 Address lines = 16

## Simplify Boolean function using Karnaugh map method F(A,B,C,D) = Σ(1,2,5,6,7,8,9,11,12,15) Also, draw the corresponding logic circuit diagram. 8m Jun2007

Simplify the following Boolean function using Karnaugh map method F( A ,B , C , D ) = Σ ( 1, 2 , 5 , 6 , 7 , 8 , 9 , 11 , 12 ,15 ) Also, draw the corresponding logic circuit diagram. 8m Jun2007   K-Map for F is: Thus, the simplified equations for F (A,… Read More »

## Draw the logic diagram of a full adder. Create a 2-bit adder-subtractor circuit using the block diagram of the full adder 6m Jun2006

Draw the logic diagram of a full adder. Create a 2-bit adder-subtractor circuit using the block diagram of the full adder 6m Jun2006 A combinational circuit which performs addition of two bits is called a half adder, while the combinational circuit which performs arithmetic addition of three bits (the third bit is the previous carry bit)… Read More »

## Use a Karnaugh’s map to design an odd parity generator circuit for 4 input bits – IGNOU MCA Assignment 2014 – 15

MASTER OF COMPUTER APPLICATIONS Course Code : MCS-012 Course Title : Computer Organisation and Assembly Language Programming Assignment Number : MCA (2)/012/Assign /2014-15 Maximum Marks : 100 Weightage : 25%   Use a Karnaugh’s map to design an odd parity generator circuit for 4 input bits. Before Designing we should know inputs which is 4… Read More »